1. Field of Invention
The present invention relates generally to leads for use in packaging semiconductor devices and, more specifically, to leads that are configured to extend at least partially across a semiconductor device. Leads that incorporate teachings of the present invention may facilitate substantial balancing of one or more physical characteristics of a semiconductor device assembly or package that includes the leads, while minimizing the thickness of the assembly or package. The present invention also relates to methods associated with the lead frames, including, but not limited to, methods for designing lead assemblies, semiconductor device assemblies, and semiconductor device packages, as well as to methods for assembling and packaging semiconductor devices.
2. Related Art
A variety of approaches have been taken in the semiconductor device industry to meet demands for ever-increasing density and ever-increasing speed. One such approach has been to incorporate multiple semiconductor devices into a single package. These so-called “multi-chip modules,” or “MCMs,” have been configured a number of different ways, depending, in part, upon the types of semiconductor devices included therein, as well as the connection patterns of the semiconductor devices.
Some multi-chip modules include semiconductor devices that are identical in function and that have identical connection patterns. When the bond pads of each semiconductor device of an MCM are all located at or near a single edge thereof, so-called “shingle stack” or “stepped” configurations may be employed. In such an arrangement, the bond pads of each lower semiconductor device are exposed beyond an adjacent peripheral edge of the next-higher semiconductor device. Identical bond pads of the semiconductor devices may be electrically connected to one another to minimize the number of electrical connections needed in the resulting package, as well as to minimize the number of input/output elements, such as leads, that are needed.
As all of the bond pads are at one side of a conventional shingle stack assembly, an interposer, redistribution layer, or similar, thickness-consuming element must be incorporated into the assembly to balance the number of leads that protrude from opposite sides of the assembly. The presence of such an element undesirably increases the volume and, thus, prevents maximization of the density of conventional shingle stack packages.
Moreover, by arranging semiconductor devices in a “shingle stack,” the heat generated during operation of the semiconductor devices may be concentrated or focused within a particular area of the package, magnifying problems (e.g., warpage, delamination, broken electrical connections, cracked encapsulant, etc.) that may occur due to thermal (or coefficient of thermal expansion, or “CTE”) mismatch between the various elements of the package. FIG. 1 illustrates this phenomenon. In FIG. 1, an MCM 10 that includes two shingle stacked semiconductor devices 30A and 30B is depicted. Semiconductor devices 30A and 30B having, respectively, bond pads 33A and 33B, are disposed over a die attach region 16 of a lead frame 15. An interposer or redistribution layer, or “RDL” 14, is located over the upper semiconductor device 30B so as to provide access to bond pads 33B of semiconductor device 30B. Semiconductor devices 30A and 30B, RDL 14, and leads 19 are electrically connected to one another by way of bond wires 18. All of these features, with the exception of external portions of leads 19, are contained within a molded encapsulant 28. A stress concentration region 40, as shown by dashed lines, of MCM 10, which corresponds substantially to the area where the bulk of the integrated circuitry of semiconductor devices 30A and 30B is located, as well as to the location where the greatest amount of heat is generated during operation of semiconductor devices 30A and 30B, is also illustrated.
Regardless of configuration, MCMs typically have stress concentration regions, or regions where thermal mismatch stresses are greatest. In recognition of these regions, packages have been designed to spread out, or balance, the regions within MCMs where heat is generated, thereby effectively diluting the heat that exists within the MCM. For example, MCMs have been designed in which “mirror image” semiconductor devices with bond pads at single edges thereof, which are identical in function, but are arranged in connection patterns that mirror one another, are positioned on opposite sides of a lead frame. Such a package is depicted in FIG. 2A. Back sides 31A′ and 31B′ of mirror image semiconductor devices 30A′ and 30B′ are positioned on opposite surfaces 26A and 26B of floating leads 25 of the MCM 10′ shown in FIG. 2A. Bond pads 33A′ and 33B′ of semiconductor devices 30A′ and 30B′ are located at the same side of MCM 10′. Bond wires 18 establish electrical connections between bond pads 33A′ and 33B′ and corresponding leads 25, 29. Some bond pads 33A′,33B′ are electrically connected to adjacent, conventional leads 29, which protrude from the side of MCM 10′ next to which the bond pads 33A′ and 33B′ are located. Other bond pads 33A′, 33B′ are electrically connected to floating leads 25, which extend to and protrude from the opposite side of MCM 10′, providing some balance in the number of leads that protrude from the opposite sides of MCM 10′.
The requirement of mirror image semiconductor devices 30A′ and 30B′ in such an assembly somewhat undesirably requires that an additional wafer mask set be generated for fabrication purposes, which increases fabrication costs and consumes valuable fabrication time, either by necessitating the use of additional equipment or by increasing down time as mask sets are replaced.
FIG. 2B depicts an MCM 10″ in which identical semiconductor devices 30A″ and 30B″ are used, with a back side 31A″ of the upper semiconductor device 30A″ secured to a first surface 26A of floating leads 25 and an active surface 32B″ of the lower semiconductor device 30B″ secured to an opposite, second surface 26B of floating leads 25. As in MCM 10′, all bond pads 33A″ and 33B″ of MCM 10″ are located on one side of MCM 10″.
As the arrangements shown in FIGS. 2A and 2B require every bond wire 18 to be located at a single side of MCM 10′, 10″, there may be significant congestion of bond wires 18. Such congestion may result in signal leakage, cross-talk, and electrical shorting. In addition, such congestion may create a practical limit on the pitch between bond pads 33A′, 33B′ or 33A″, 33B″, as well as on the number of bond pads 33A′, 33B′ or 33A″, 33B″ that may be placed along an edge of a semiconductor device 30A′, 30B′ or 30A″, 30B″. Congestion is compounded as additional semiconductor devices are added to the assembly.
The inventors are not aware of an MCM with maximized density and minimized thermal stress that is designed to avoid congested electrical connections.